74S113
Flip Flop Dual JK Set(Preset) and Reset -VE Edge
Specifications
|
Function
|
Set(Preset) and Reset
|
|
Type
|
JK Type
|
|
Output Type
|
Complementary
|
|
Number of Elements
|
2
|
|
Number of Bits per Element
|
1
|
|
Clock Frequency
|
80 MHz
|
|
Max Propagation Delay @ V, Max CL
|
7ns @ 5V, 15pF
|
|
Voltage - Supply
|
4.75V ~ 5.25V
|
|
Current - Quiescent (Iq)
|
50 mA
|
|
Operating Temperature
|
0°C ~ 70°C (TA)
|
|
Mounting Type
|
Through Hole
|
|
Supplier Device Package
|
14-PDIP
|
|
Package / Case
|
14-DIP (0.300", 7.62mm)
|
Additional Information
| Device | IC |
$0.17
74S113—
$0.17
Product Information
Product Information
Shipping & Returns
Shipping & Returns
Description
Flip Flop Dual JK Set(Preset) and Reset -VE Edge
Specifications
|
Function
|
Set(Preset) and Reset
|
|
Type
|
JK Type
|
|
Output Type
|
Complementary
|
|
Number of Elements
|
2
|
|
Number of Bits per Element
|
1
|
|
Clock Frequency
|
80 MHz
|
|
Max Propagation Delay @ V, Max CL
|
7ns @ 5V, 15pF
|
|
Voltage - Supply
|
4.75V ~ 5.25V
|
|
Current - Quiescent (Iq)
|
50 mA
|
|
Operating Temperature
|
0°C ~ 70°C (TA)
|
|
Mounting Type
|
Through Hole
|
|
Supplier Device Package
|
14-PDIP
|
|
Package / Case
|
14-DIP (0.300", 7.62mm)
|
Additional Information
| Device | IC |
