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74LS113

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74LS113

Dual Negative-Edge-Triggered J-K flip-flops

Specifications

Electrical Characteristics

  • Supply Voltage (Vcc): 4.75V – 5.25V
  • Input Voltage High (VIH): Min 2V
  • Input Voltage Low (VIL): Max 0.8V
  • Output Voltage High (VOH): Min 2.7V at IOH = –0.4 mA
  • Output Voltage Low (VOL): Max 0.5V at IOL = 8 mA
  • Propagation Delay (Clock to Q): Typical 15 ns
  • Power Dissipation: Approx. 20 mW per device

Absolute Maximum Ratings

  • Supply Voltage (Vcc): 7V
  • Input Voltage: –0.5V to 7V
  • Operating Temperature: 0°C to +70°C (Commercial)
  • Storage Temperature: –65°C to +150°C

Additional Information

Device IC
$0.02

Original: $0.07

-71%
74LS113

$0.07

$0.02

Product Information

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Description

Dual Negative-Edge-Triggered J-K flip-flops

Specifications

Electrical Characteristics

  • Supply Voltage (Vcc): 4.75V – 5.25V
  • Input Voltage High (VIH): Min 2V
  • Input Voltage Low (VIL): Max 0.8V
  • Output Voltage High (VOH): Min 2.7V at IOH = –0.4 mA
  • Output Voltage Low (VOL): Max 0.5V at IOL = 8 mA
  • Propagation Delay (Clock to Q): Typical 15 ns
  • Power Dissipation: Approx. 20 mW per device

Absolute Maximum Ratings

  • Supply Voltage (Vcc): 7V
  • Input Voltage: –0.5V to 7V
  • Operating Temperature: 0°C to +70°C (Commercial)
  • Storage Temperature: –65°C to +150°C

Additional Information

Device IC